Current Memory Controller Hubs (MCHs) may be capable of supporting two memory channels, each of which may have up to four memory devices. The memory devices used in current computer systems may be memory modules packages, such as dual in line memory modules (DIMMs) or in the case of older computer systems the memory modules may be dynamic random access memories (DRAMS). Within each memory channel, a memory controller may populate the DIMMs in a specified order using a linear memory map. The memory control starts populating the memory modules starting with the memory module in the DIMM socket physically located farthest from the MCH on the channel. For example, if the DIMM sockets are numbered from 0 to 3, with the DIMM#3 being farthest from the MCH, the memory module in the DIMM#3 is populated first. Once the memory module in DIMM#3 is fully populated, then the next DIMM, DIMM#2, will be populated next, and so on. This places the load on the DIMMs as far from the MCH as possible. Because current memory controllers use memory addresses that are relative to a linear memory map and the physical memory arrangement of the DIMM is also linear, there is a one-to-one correspondence between the memory map and the physical memory arrangement.